Alkaline developers and chemical etchants, used to develop the photoresist layer for first and second metal layer depositions in existing FET processes, severely attack the contact metal, thereby producing poor interlevel contacts and possibly electrical failures. Also, contaminant residues, or voids created by the reaction of the etchants with existing contact metals or semiconductor substrates, will impact reliability and life of the device structures. These residues and voids increase resistance which is a significant cause of device failure.
It is known to protect ion implanted and diffused contacts by depositing a barrier metal over the implanted area so that it will not be depleted by subsequent etching and/or other processes. This provides protection for the ion implanted diffused and/or buried contacts. However, it does not protect against chemical attack on the sides of the metal contact in via holes.
A common problem with metal deposition of contact or other metal to provide interconnections in the semiconductor device is that the state-of-the-art deposition tooling deposits metal at an angle to the device wafer surface, primarily because the molten metal source is not at a "line of sight" perpendicular to the wafer surface. Therefore voids or spacing will inherently exist between the contact metal and the sides of the etched insulator.